The present invention relates to a multi-port semiconductor memory device in which each memory cell is coupled to at least two complementary pairs of bit lines.
An example of this type of memory device is a multi-port static random-access memory (SRAM) in which each memory cell is coupled by transistors to a complementary pair of read bit lines, which supply data to an output port, and a complementary pair of write bit lines, which receive data from an input port. When data are written in a memory cell, the transistors coupling the memory cell to the write bit lines are switched on, and a write driver drives one of the write bit lines to the high level and the other write bit line to the low level. When data are read from a memory cell, the transistors coupling the corresponding memory cells to the read bit lines are switched on, thereby placing the two read bit lines at different electrical potentials, and the potential difference between the read bit lines is amplified by a sense amplifier.
The read and write bit lines are laid out so that each read bit line runs adjacent and parallel to one of the write bit lines for a considerable distance. Capacitive coupling between the adjacent bit lines creates a problem known as coupling noise. When the write driver alters the potential of a write bit line, the alteration is temporarily coupled onto the adjacent read bit line, possibly reversing the potential relationship between the two read bit lines. To avoid having this reversed potential relationship read out as incorrect data, operation of the sense amplifier must be delayed until sufficient time has elapsed for the correct potential relationship to be restored.
As memory integration densities rise, the spacing between the bit lines decreases and the problem of coupling noise becomes increasingly serious. In a typical multi-port SRAM with 0.35-.mu.m design rules, for example, the spacing between adjacent read and write bit lines is 0.5 .mu.m, and the capacitance between the bit lines is 0.1 pF, enough to require a significant delay of sense-amplification in order to ensure that correct data are read. The result is an undesirable data output delay.
The problem of coupling noise also appears in single-port dynamic random-access memory devices, in which the same bit lines are used for both read and write access. A known countermeasure to coupling noise in dynamic random-access memories is to have the two bit lines in each complementary pair cross over at one or more points. These cross-overs invert the data on the bit lines, but since the same bit lines are used for both reading and writing, the read and write data are inverted in the same way and no problem arises.
In a multi-port semiconductor memory, in which the same memory cells are accessed through different pairs of bit lines, the bit-line cross-over method of dealing with coupling noise cannot be employed without separate means of overcoming the problem of data inversion.